Superconducting Chip-to-chip Interconnects

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Superconducting Chip-to-chip Interconnects

High density of on-chip circuitry leads to higher speed, lower power, and, apparently, to greatly reduced cost per function. Higher density at the system level should also lead to equivalent gains. Indeed, it is now being argued that achieving such gains is much more practical by increasing the density of chip-to-chip interconnects because we are not pushing the state of the art in high-resolution fabrication in such interconnects; dimensions of chip-to-chip interconnects are typically expressed in mils, not microns. However, studies both in the U.S. and abroad show that the limit to achieving such density in normal metallic interconnects is set by the the resistivity of the metal (see, for example, Masaki [4]). In our previous work, it appeared that a signal line pitch of about 35 microns was the practical limit for terminated, matched transmission lines operating at a clock frequency of 1 GHz.

Given the above limit, the possible application of (high temperature) superconductors in such transmission lines is obvious. An early (paper) study treated the high temperature superconductors as high-temperature analogs of low-temperature, metallic superconductors and predicted significant advantages at clock frequencies up to several GHz.

Under this contract, we built transmission lines using the high-temperature superconductor YBCO, and experimentally demonstrated that the predictions of the paper study held good for lines down to a few microns; i.e., the effects of the kinetic inductance (due to the low density of superconducting electron-pairs) in this material were negligible for frequencies up to 20GHz. The PhD dissertation of B. W. Langley [5] describing this work is in the final stages of preparation.

Michael Flynn
Tue Dec 13 10:27:47 PST 1994