References

1

H. Ling. ``High-Speed Binary Adder.'' IBM Journal of Research and Development, Vol. 25, No. 2 and 3, pages 156-166, May 1981.

2

M. P. Farmwald. On the Design of High-Performance Digital Arithmetic Units. PhD theses, Stanford University, August 1981.

3

M. Santoro. Design and Clocking of VLSI Multipliers. PhD thesis, Stanford University, October 1989.

4

Akira Masaki. ``Electrical Resistance as a Limiting Factor for High Performance Computer Packaging.'' IEEE Circuits and Devices Magazine 5(22), 1989.

5

B. W. Langley. High-Temperature Superconducting Microstrip Lines: Digital System Interconnect Applications and Magnetic Penetration Studies PhD Dissertation, Stanford University, in preparation (1993).