A Redundant Digit Floating Point System. Hossam A.H. Fahmy, June 2003. (1520 kB) [pdf, (1136 kB)]
An Interconnect-Driven System-On-Chip Floorplanning Framework. Patrick Hung, August 2002. (2810 kB)
High-Performance Arithmetic for Division and the Elementary Functions. Albert A. Liddicoat, February 2002. (520 kB) [pdf]
Improvement of Video Coding Efficiency for Multimedia Processing. Alice C. Yu, January 2002. (520 kB) [pdf]
Cost Performance Optimizations of Microprocessors. Steve Te-Hsiang Fu, May 2001. (4817 kB) [pdf]
Design of High-Performance Field Programmable Gate Arrays for Data Intensive Applications. Hyuk-Jun Lee, Mar. 2001. (468 kB)
Rational Arithmetic Units in Computer Systems. Oskar Mencer, Jan. 2000. (446 kB) [pdf]
VLIW Processors: Efficiently Exploiting Instruction Level Parallelism. Kevin Rudd, Dec. 1999. (434 kB) [pdf]
Checkpointing Apparatus and Algorithms for Fault-Tolerant Tightly-Coupled Multiprocessors. Dwight Sunada, May 1999. (1420 kB) [pdf]
Latency Tolerant Architectures. James E. Bennett, September 1998.
Communication Mechanisms in Shared Memory Multiprocessors. Gregory T. Byrd, August 1998. (1617 kB)
Area and Performance Optimized CMOS Multipliers. Hesham Al-Twaijry, August 1997. (441 kB)
CMOS Technology Scaling and Its Impact on Cache Delay. Grant W. McFarland, June 1997. (655 kB)
Architecture and Arithmetic for Multimedia Enhanced Processors. Daniel F. Zucker, June 1997. (1204 kB)
Network Interfaces. Paul A. Flaherty, April 1997.
Design Issues in High Performance Floating Point Arithmetic Units. Stuart F. Oberman, January 1997. (430 kB) [pdf]
Expansion Caches for Superscalar Machines. John D. Johnson, April 1996. (420 kB)
Sparse Adaptive Memory. Brian K. Flachs, January 1995. (1.2 MB) [pdf]
Design and Analysis of Update-Based Cache Coherence Protocols for Scalable Shared-Memory Multiprocessors. David B. Glasco, January 1995.
High-Performance CMOS System Design using Wave Pipelining. Kevin J. Nowka, September 1995. (1.0 MB)
I/O Characterization and Attribute Caches for Improved I/O System Performance. Kathy J. Richardson, January 1995. [pdf]
Wave Pipelining: Theoretical and Practical Issues in CMOS. E. Fabian Klass, Delft University of Technology, September 1994. (998 kB)
Fast Multiplication: Algorithms and Implementation. Gary W. Bewick, March 1994. (1.8 MB)
Reducing the Latency of Floating-Point Arithmetic Operations. Nhon T. Quach, January 1994.
A Nonlinear Silicon Cochlea. Neal A. Bhadkamkar, January 1994.
A Scalable Computer Architecture For Lattice Gas Simulations. Fung Fung Lee, June 1993. (887 kB) Tech-report pdf (1608kB)
The Interaction of Virtual Memory and Cache Memory. William L. Lynch, June 1993. (1.3MB)
Specialized Caches to Improve Data Access Performance. Brian K. Bray, June 1993.
High-Radix Algorithms for High-Order Arithmetic Operations. Eric M. Schwarz, April 1993.
The GLORI Strategy for Multiprocessors: Integrating Optics into the Interconnect Architecture. Timothy M. Pinkston, January 1993. (1.9 MB)
Runtime Resource Management in Concurrent Systems. Tin-Fook Ngai, April 1992.
Cache Coherence for Scalable Shared Memory Multiprocessors. Manu Thapar, January 1992.
Post-Game Analysis - A Heuristic Resource Management Framework for Concurrent Systems. Jerry C. Yan, January 1989.
Limit on Multiprocessing Algorithm Execution Time Bounded by Interprocessor Communication. Robert J. Meier, January 1989.
Tradeoffs in Data-Buffer and Processor-Architecture Design. Johannes M. Mulder, January 1988.
Performance Prediction of Concurrent Systems. Victor W.-K. Mak, January 1988.
Improving Garbage Collector Performance in Virtual Memory. Robert A. Shaw, March 1988.
Studies in Prolog Architectures. Evan M. Tick, June 1987.
Processor Architecture and Cache Performance. Chad L. Mitchell, June 1986.
Techniques for Designing High-Performance Digital Circuits Using Wave Pipelining. Derek C. Wong, June 1986.
Architectural Elements for Bitmap Graphics. Cary D. Kornfeld, June 1985.
Memory Hierarchies for Directly Executed Language Microprocessors. Donald B. Alpert, June 1984.
Comparative Analysis of Computer Architectures. Jerome C. Huck, March 1983.
Studies in Execution Architectures. Scott P. Wakefield, January 1983.
Detection of Concurrency in Directly Executed Language Instruction Streams. Robert G. Wedig, June 1982.
A Language-Oriented Approach to Computer Architecture. Clark R. Wilcox, June 1980.
Performance Characteristics of Parallel Processor Organisations. Ruby B. Lee, May 1980.
An Emulation Based Analysis of Computer Architecture. Charles Neuhauser, Johns Hopkins University, 1980.
Directly Executed Languages. Lee W. Hoevel, Johns Hopkins University, 1978.
Stochastic Modeling of Computer Systems and Networks. Philip Yu, 1978.
Program Behavior and the Performance of Memory Systems. B. R. Rau, 1977.
Towards a Theory for the Analysis and Synthesis of Systems Exhibiting Concurrency. Tilak Agerwala, Johns Hopkins University, June 1975.
Models of Concurrent Processors. Renault Regis, Johns Hopkins University, June 1973.
Representation and Detection of Concurrency Using Ordering Matrices. Gary S. Tjaden, Johns Hopkins University, June 1972.
Algorithmic Measures. Robert W. Cook, Northwestern University, June 1970.
An Algorithm for the Management of Human Acid-Base Data. Thomas E. Williams, Jr., M.D., Northwestern University, June 1969.
Analysis and Synthesis of Self Repair Techniques for Digital Computers. Stephen A. Syzgenda, Northwestern University, June 1968.
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