To allow for the study of many different parallel architectures, a Parallel Architecture Description Language (PADL) was developed. A PADL file consists of a description of each of the major components (processors, caches, and memory modules and busses) of the system and a netlist describing how they are interconnected. Each of the components has an optional section that further describes itself. For example, the cache component has options for setting the size, the linesize, the associativity, and the cycle time of that particular instance of a cache component.
PADL allows for a large number of architectures to be studies without major modifications to the simulator. The current version of PADL allows for a clustering of processors, multilevel caches, and split and unified caches. In addition, since PADL allows each component to be individually configured, non-homogeneous systems can also be studied.
PADL has been extended to allow for macro definitions. The developer may now define one macro for a component and replicate it, thus simplifying the description process and reducing the possibility of errors. At the same time, each component can still be separately defined if the developer so chooses.