Considerable progress has been made in the area of high-performance packaging. In particular, a technology for attaching and connecting chips onto a silicon membrane multichip module (MCM) has been demonstrated [P2]. This technology utilizes conventional IC processing techniques and offers a high density (over 500 per chip) of small (as small as ), low resistance (less than 0.024 /contact) and low parasitic interconnections between a chip and the substrate (see Figure 3). In addition, controlled impedance striplines have been fabricated on the MCM substrate.
Figure 3: (a) Membrane multi-chip module in Si. (b) Process steps for making membrane MCM substrate. (c) Time domain reflectometry.
The initial experimental striplines have been implemented in a three-layer ground-signal-ground configuration with aluminum conductors and polyimide dielectric. The sandwiched structure ensures a constant characteristic impedance as the stripline crosses the boundary between the MCM substrate and the chip. The stripline has been characterized with time domain reflectometry. The delay is 68 psec/cm which corresponds to a propagation velocity of cm/sec. A pulse rise time of 72 psec, which corresponds to a dB bandwidth of 3 GHz, has been measured on a 1-cm long line. These results are consistent with those predicted by simulations.