EE385b Seminar, May 28, 1997, 12:15 (noon), Gates B08.

       EE385b Computer Architecture Seminar

http://arith.stanford.edu/ee385b_sched.spr97.html

Title:  Hardware implementations of image and video compression algorithms
Speaker:   K. Konstantinides, HP Labs, kk@hpkronos.hpl.hp.com
Date:   May 28, 1997, 12:15 (noon)
Place:    CS Building, Gates B08.

Abstract:

  We discuss design tradeoffs for the hardware implementation
of the core algorithms of the image and
video compression standards, such as the DCT, motion estimation, and
variable length coding.

  We will discuss distributed-arithmetic based designs (for the DCT),
linear arrays (for motion estimation) and parallel variable length
encoders and decoders.


Biography of Konstantinos Konstantinides

  Konstantinos Konstantinides received the engineering Diploma from
 the  University  of  Patras,  Patras,  Greece,  in 1979, the M.S.
 degree from the University of  Massachusetts,  Amherst, in  1980,
 and   the   Ph.D.   degree   from  the  University of California,
 Los  Angeles,  in  1985,  all   in   electrical engineering.

  Since February of 1985 he has been  a  Member  of  the  Technical
 Staff    at    Hewlett-Packard    Laboratories   in   Palo  Alto,
 California, where he is involved  in  digital  signal  and  image
 processing.  Most recently he has been working on fast algorithms
 for the implementation of  the  MPEG  audio  coders  on   general
 purpose computers and JPEG optimization for color facsimile.

  He is a Senior member of  IEEE,  a member of the  IEEE
 Technical   Committee   on   the design and implementation
 of signal processing systems, and Associate Editor of the
 IEEE Transactions on Signal Processing.
 Along with V. Bhaskaran, Dr. Konstantinides co-authored the
 book "Image and Video Compression Standards - Algorithms and
 Architectures" (Kluwer Academic Publishers, 1995).