Special University Oral Examination

                Regenerative Feedback Repeaters
               for Programmable Interconnections

                      Ivo J. Dobbelaere

               Information Systems Laboratory
            Department of Electrical Engineering
                     Stanford University

                3:00 pm  Wednesday, May 24
                          CIS 101


                         Abstract

The performance of Field Programmable Gate Arrays is mainly limited
by the delay of the programmable interconnection network. This delay
increases quadratically with the number of series switches, and is
especially a problem when the programmable switches are implemented
using MOS transistors since these have a substantial resistance and
capacitance. The delay can be reduced at the cost of routability by
limiting the number of series switches per interconnection, or at the
cost of area by inserting repeaters. Conventional bidirectional
repeaters consist of sets of unidirectional tristate buffers and
memory cells, and their benefit is limited due to a high area and
delay penalty.

In this talk we present an alternative repeater based on regenerative
feedback. This repeater senses the beginning of a transition, and
subsequently enforces it. Its area is small since it only requires
one buffer and no memory cells. In addition, fast operation is possible
since the repeater propagation delay is not inserted in the signal path.
The principle is similar to the signal propagation along myelinated
nerve axons, the internal signaling medium of the neuron. We will
discuss CMOS implementations, design issues, and limitations.
Experimental results show that substantial performance improvements
over the conventional technology can be achieved.

Refreshments will be served at 2:45 in CIS 101.